Integrated circuits (ICs) are generally formed by printing several patterns, each in a separate photo layer, on a semiconductor substrate. During an IC process flow, before printing the pattern for each photo layer on the semiconductor substrate, a lithographic scanner must first align pre-layer alignment marks (on the preceding layer) to determine the exact location of the wafer and the pre-layer pattern shift status. The basic principle of lithographic scanner alignment is based on light diffraction and interference phenomena. More specifically, a lithographic scanner scans pre-layer alignment marks using a single color laser. Then, different signal strengths are produced by light diffraction and interference between incident and reflected light and captured by the lithographic scanner to determine the location of the wafer and the pattern on the wafer.
The incident light from the lithographic scanner can penetrate through most layers of the semiconductor substrate. As a result, reflected light is produced at every interface between layers. Moreover, where multiple photo layers make up the semiconductor substrate, the phase depth is thick, and the variations among the layers can cause unstable phase shifts. In particular, different light phase shifts will induce different signal strength. Therefore, to produce a stable alignment signal, as required to control overlay performance, the phase shift among all reflected light must also be kept stable.
A known approach to reduce the phase shift inherent to alignment processes for a semiconductor substrate with multiple photo layers is to form large grating elements in a layer in advance of and in the same location as alignment marks formed in the subsequent overlying layer. For example, as illustrated in FIG. 1, photolayers 103, 105, and 107 are printed on a semiconductor substrate to form an IC pattern. Before printing a pattern for current layer 107, a lithographic scanner (not shown for illustrative convenience) must align lithographic alignment marks 109 printed on layer 105 to obtain the exact wafer location and the pre-layer pattern shift status. To reduce the phase depth from the total thickness of layers 101, 103, and 105 to phase depth 119, a grating 115 is formed on layer 103 under the alignment marks 109. Some of the incident light 111 from the lithographic scanner passes through the photoresist 113 and the photo layers 107 and 105, reaching large grating 115, which blocks light from passing to underlying layers, such as 103 and 101. As a result, when the scanner aligns the alignment marks, the incident light from the lithographic scanner can only penetrate through one layer and will be reflected completely by the underlying grating due to the large grating size (e.g., 1 to 9 microns (μm)). The incident light 111 reflected by the large grating 115 adds to reflected light 117. Consequently, the phase depth is reduced to the thickness of one layer, and the alignment signal is more stable. However, because some light is still reflected back to the lithographic scanner some instability of the alignment signal still remains, degrading overlay performance.
A need therefore exists for methodology enabling further stabilization of an alignment signal for lithographic printing of IC photo layers, and a resulting device.